CXA2061S
Y/C/RGB/D for NTSC Color TVs
Description The CXA2061S is a bipolar IC which integrates the luminance signal processing, chroma signal processing, RGB signal processing, and sync and deflection signal processing functions for NTSC system color TVs onto a signal chip. The IC also includes deflection processing functions for wide TVs. 48 pin SDIP (Plastic)
Features * Reduction in peripheral parts (ceramic oscillator, AKB sample-and-hold capacitor, etc.) * I2C bus compatible * Built-in deflection compensation circuit which is capable of supporting variaus wide modes * Non-adjusting V oscillator frequency with a countdown system * Non-interlace display support (even/odd selectable) * Non-adjusting Y/C filter * Three sets of CV inputs, two sets of Y/C inputs (can serve as both Y/C and CV inputs), one set of Y/C inputs supports an external combfilter, two sets of RGB inputs, one set of YUV inputs * It can be outputted YUV on RGB1 inputs * Built-in dynamic picture and dynamic color circuits * Built-in AKB and gamma correction circuits * FSC output Applications Color TVs (4:3, 16:9) Structure Bipolar silicon monolithic IC Abusolute Maximum Ratings (Ta = 25C, GND1, 2 = 0V) * Supply voltage VCC1, 2 -0.3 to +12 V * Operating temperature Topr -20 to +75 C * Storage temperature Tstg -65 to +150 C * Allowable power dissipation PD 1.5 W (when mounted on a 50mm x 50mm board) * Voltages at each pin -0.3 to VCC1, 2 + 0.3 V Operating Condition Supply voltage
VCC1, 2
9 0.5
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
E97538-PS
Block Diagram
EY IN R1 IN YUV SW G1 IN B2 IN (B-YOUT)
30 29
X'tal
APED
GND2
Y CLAMP
B1 IN
VCC2
APC FIL
EB-Y IN
YS1
FSCOUT
ER-Y IN
R2 IN (YOUT)
45 47 44 15 25 8 38 28 26
46 40 1 39 36 31 27 32 37
FSC EYUV CLAMP YUV SW YUVOUT CLAMP RGB 1/2 ABL/PEAK LIM AKB <>
VM OUT/ V PROT
G2 IN (R-YOUT)
YS2/YM
42 ABL FIL 3 ABL IN 21 IK IN
APC C VCO DEMOD. DPIC
COLOR AMP AXIS
24 B OUT 23 G OUT 22 R OUT
ACC DET. Y/C MIX RGB CLAMP
ACC AMP
BPF
FILTER ALIGNMENT CAL. by fsc
CLAMP DC TRAN
YS1 SW YM SW YS2 SW DYNAMIC COLOR PICTURE AMP GAMMA AMP CLAMP BRIGHT CONT. DRIVE AMP CUTOFF CONT. R/G/B BLK
CHROMA AMP
COLOR KILLER <>
SCP
HD
REG
V TIM
AFC FIL
HP/ HPROTECT
GND1
I REF
VCC1
-2-
TRAP + EQ SHARPNESS DL SHARPNESS AMP WIDE SAW FUNC. COUNT DOWN LINE COUNTER V TIM GEN. VSAW GEN. VTIM AFC <> <> HSAW GEN. (ZAP) H TIM GEN. PHASE DET. HPROT <> 20 17 5 18
CHROMA
DAC SW
VPROT <> VM AMP (OFF YS/YM)
I2C BUS DECODER STATUS I/F
35 SDA 34 SCL
TV/C2 IN 43
CHROMA SW
ATT
14 VD- 13 VD+
C1 IN 2
VD SAW FUNC.
CVBS2/Y2 IN 41
Y SW
Y
CVBS1/Y1 IN 4
COMB-C IN 7
MONITOR SW
V SYNC SEP
EW PARABOLA FUNC.
11 EW
COMB-Y IN 9
VIDEO SW
H SYNC SEP
MON OUT 6
HD GEN. IREF REG
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